This invention is in the field of data exchange between the main storage of a computer and a plurality of off-line input and output (I/O) devices More particularly, the invention is in the field of transferring such information through a computer I/O system in which a plurality of I/O devices are connected to a computer through one of a plurality of interface adapters (IFAs).
In the field of distributed I/O control and data exchange, it is known to connect a plurality of interface adapters to the CPU and main storage of a computer. Each interface adapter is connected to one or more I/O devices to provide access to the main storage. Conventionally, these units compete with each other in offering interrupts to the instruction processing unit of the CPU for the purpose of servicing software-level I/O commands. In particular, the IBM System/370 XA, Model 4381 employs IFA-initiated "traps" (high speed internal interrupts generated by an I/O channel) to "steal" processing time on the instruction processing unit in order to conduct an I/O process.
Recent advances in I/O system technology have resulted in realization of microprogrammed I/O processors which are separate and distinct from the CPU of the computer. These processors provide an I/O system with the power to conduct I/O processing in parallel with CPU operations. Such processors are denoted as shared channel processors (SHCP). An SHCP's microprogram enables it to concurrently execute a plurality of I/O procedures by employing multiprocessing. Further, the multiprocessing ability of an SHCP requires the provision of a plurality of I/O channel resources to support I/O multiprocessing. As a result an SHCP is connected to a plurality of IFA's in order to concurrently conduct more than one I/O process.
Each IFA, in turn, controls the operations of two pairs of I/O channels, and can support up to four concurrent I/O data transfers, each conducted in one of the channels.
Further, each I/O channel buffers data to or from the computer main storage through a channel data buffer (CDB). The channel either places data in its CDB, after which the main storage obtains it, or transfers data out of the CDB after placement therein by main storage for forwarding to an I/O device.
In the usual configuration of an I/O system, the SHCP and CDBs are connected to IFAs through cables or wire connections. As the number of IFAs grows, the physical cable interfaces also increase in size.
It would be desirable to provide for transfer of data through such an I/O system at a maximum rate with a minimum number of interface lines. The minimization of interface lines is desirable in order to maximize the provision of scarce computer hardware space and reduce I/O pin count. With the provision of four channels in one IFA, and the direct connection of each channel to its own CDB, it should be appreciated that the reduction of the control exchange interface between the IFA and its SHCP is an urgent necessity. Moreover, since each SHCP serves more than one IFA, a physically large SHCP to IFA control interface will limit the number of IFA's that can be serviced by an SHCP.
Further, provision must be made for low-level control of data transfer between each CDB and its associated channel, if only to establish the direction of data transfer and to validate the transfer of data. Manifestly, the proliferation of this control interface will also limit the size of the data transfer interface and, relatedly, reduce the rate at which data can be transferred across it.